1. Field of the Invention
The present invention relates to a quadrature amplitude modulation (QAM) demodulator, for example for demodulating digital video and data signals transmitted via cable or wireless channels, and to a receiver including such a demodulator.
2. Description of the Prior Art
QAM is used for transferring digital video and data signals over cable or wireless channels. In this modulation scheme, the phase and amplitude of a sinusoidal carrier wave are modulated by the digital information. For example, in the modulation scheme known as QAM256, each symbol is chosen from a set of 256 possible amplitude-phase combinations. Thus, each symbol may represent 8 bits of digital data.
Known types of QAM demodulators make use of timing synchronisers and carrier synchronisers. For example, a typical known timing synchroniser resamples incoming sampled digital signals from an upstream analogue-to-digital converter (ADC). The ADC is free-running in the sense that it is not phase-locked to the transmitted symbol clock. It is not practical to make the ADC sampling rate equal to a multiple of the symbol rate because this may vary for any given communication channel.
A known type of timing synchroniser comprises a digital phase locked loop (DPLL). The DPLL re-samples the signal from the ADC and digitally interpolates the values of samples between the samples from the ADC. A timing error is computed from the re-sampled signal and is filtered and fed back to control the phase of the resampling. When the re-sampling phase matches the timing used by the transmitting modulator, the timing error vanishes and the DPLL locks.
During a timing acquisition mode of the timing synchroniser, the resampling rate or period is swept between upper and lower values unless and until lock is established in the DPLL. The incoming QAM signal may have a wide range of signal-to-noise ratios and an unpredictable amount of multipath. If the sweep rate is chosen to be sufficiently low to permit locking in conditions where the incoming signal has a low signal-to-noise ratio and/or is subjected to a high level of multipath, the timing synchroniser may lock incorrectly when presented with a signal of higher signal-to-noise ratio and/or of lower multipath. Conversely, if the sweep rate is relatively high, the timing synchroniser may fail to lock in the presence of signals of poorer signal-to-noise ratio and/or multipath. The choice of sweep rate is therefore a function of signal-to-noise ratio and multipath but these are unknown. The sweep rate must therefore be selected as a compromise between conflicting requirements.
If a high sweep rate is chosen, timing synchroniser lock may only be achieved with relatively good quality incoming signals. Conversely, if a lower sweep rate is chosen, the presence of high quality incoming signals may result in false lock being achieved.
Known QAM demodulators also make use of carrier synchronisers embodied, for example, as DPLLs which are used to lock to the carrier frequency and phase of the incoming signal. The frequency of a locally generated signal is similarly swept until the DPLL achieves lock and similar compromises in the sweep rate have to be made.